feat: make kernel architecture-agnostic; primitive work on arm port

kernel/src/Pci/Pci.cpp

@@ -5,13 +5,14 @@
 */
 
 #include "Pci.hpp"
+#include <Arch/Interrupts.hpp>
 #include <Terminal/Terminal.hpp>
 #include <CppLib/Stream.hpp>
 #include <Memory/HHDM.hpp>
 #include <Memory/Paging.hpp>
 #include <Io/IoPort.hpp>
 #include <CppLib/Spinlock.hpp>
-#include <Timekeeping/ApicTimer.hpp>
+#include <Timekeeping/Timer.hpp>
 
 using namespace Kt;
 
@@ -330,6 +331,25 @@ namespace Pci {
         return 0;
     }
 
+    bool WriteMsiMessage(uint8_t bus, uint8_t device, uint8_t function, uint8_t cap, uint8_t irq) {
+        Arch::MsiMessage msi;
+        if (!Arch::ComposeMsi(irq, msi)) {
+            return false;
+        }
+        uint16_t msgCtrl = LegacyRead16(bus, device, function, cap + 2);
+
+        LegacyWrite32(bus, device, function, cap + 4, (uint32_t)msi.address);
+        if (msgCtrl & (1 << 7)) {
+            // 64-bit: Upper Address at cap+8, Data at cap+12
+            LegacyWrite32(bus, device, function, cap + 8, (uint32_t)(msi.address >> 32));
+            LegacyWrite16(bus, device, function, cap + 12, (uint16_t)msi.data);
+        } else {
+            // 32-bit: Data at cap+8
+            LegacyWrite16(bus, device, function, cap + 8, (uint16_t)msi.data);
+        }
+        return true;
+    }
+
     bool DisableInterruptDelivery(uint8_t bus, uint8_t device, uint8_t function) {
         uint16_t command = LegacyRead16(bus, device, function,
             (uint8_t)PCI_REG_COMMAND);