feat: aarch64 port - Raspberry Pi 4/400 SD boot (SDHCI, ext2 root + first-boot grow), USB hubs, PCI INTx routing, SMP, DMA fences

kernel/src/Drivers/Storage/Nvme.cpp

@@ -87,7 +87,9 @@ namespace Drivers::Storage::Nvme {
     //            CQ y Head Doorbell offset = 0x1000 + ((2y+1) * doorbellStride)
     // -------------------------------------------------------------------------
 
+    // The submission queue entry must be visible before the doorbell.
     static void WriteSqTailDoorbell(uint16_t queueId, uint16_t value) {
+        Arch::DmaWriteFence();
         uint32_t offset = 0x1000 + (2 * queueId) * g_doorbellStride;
         *(volatile uint32_t*)(g_mmioBase + offset) = value;
     }
@@ -152,6 +154,8 @@ namespace Drivers::Storage::Nvme {
             uint16_t status = cqe->Status;
 
             if ((status & CQE_PHASE_BIT) == phase) {
+                // The rest of the entry (and the data) before the phase bit.
+                Arch::DmaReadFence();
                 uint16_t consumedId = cqe->CommandId;
                 uint32_t result = cqe->Result;
                 uint16_t sqHead = cqe->SqHead;