feat: aarch64 port - fix build system obstacles, add exception handling, page tables

kernel/src/Arch/aarch64/Platform.cpp

@@ -12,12 +12,32 @@
 
 using namespace Kt;
 
+extern "C" char ArchExceptionVectors[];  // Vectors.S
+
 namespace Arch {
 
+    // SCTLR_EL1.WXN: writable memory is execute-never
+    static constexpr uint64_t SctlrWxn = 1ULL << 19;
+
     void EarlyInitialize() {
         // No per-CPU data yet: Smp::TryGetCurrentCpuData must see null.
         asm volatile("msr tpidr_el1, xzr");
 
+        // Run on SP_EL1 so exceptions taken from the kernel arrive on the
+        // stack it is already using (Vectors.S has no SP_EL0 handlers).
+        asm volatile("mov x9, sp\n\tmsr spsel, #1\n\tmov sp, x9" ::: "x9", "memory");
+
+        // The vectors need no allocation, so take over from the
+        // bootloader's right away.
+        asm volatile("msr vbar_el1, %0\n\tisb" :: "r"(ArchExceptionVectors) : "memory");
+
+        // Kernel mappings are RWX (Paging.cpp), so writable must not
+        // imply execute-never.
+        uint64_t sctlr;
+        asm volatile("mrs %0, sctlr_el1" : "=r"(sctlr));
+        sctlr &= ~SctlrWxn;
+        asm volatile("msr sctlr_el1, %0\n\tisb" :: "r"(sctlr));
+
         // CPACR_EL1.FPEN = 0b11: FP/SIMD usable at EL0 and EL1 (the kernel
         // itself is built -mgeneral-regs-only; Context.S saves user state).
         uint64_t cpacr;
@@ -26,10 +46,10 @@ namespace Arch {
         asm volatile("msr cpacr_el1, %0\n\tisb" :: "r"(cpacr));
     }
 
-    // TODO(aarch64): install the VBAR_EL1 vector table (EL1/EL0 synchronous
-    // exceptions -> panic / SyscallDispatch, IRQ -> GIC -> ArchIrqDispatch).
+    // Installed by EarlyInitialize.
     void InitializeTraps() {
-        KernelLogStream(WARNING, "Arch") << "aarch64: exception vectors not implemented";
+        KernelLogStream(OK, "Arch") << "Installed exception vectors at 0x" << base::hex
+            << (uint64_t)ArchExceptionVectors;
     }
 
     // MAIR_EL1 attribute indices are chosen together with the page-table