feat: add support for aarch64 timer/interrupts, port MontaukOS userspace
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101 files changed
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@@ -13,6 +13,18 @@
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namespace gui {
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// Drain write-combining stores to the scanout buffer before it is flipped
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// or composited by someone else.
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inline void wc_store_fence() {
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#if defined(__x86_64__)
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asm volatile("sfence" ::: "memory");
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#elif defined(__aarch64__)
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asm volatile("dsb st" ::: "memory");
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#else
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#error "unsupported architecture"
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#endif
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}
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class Framebuffer {
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uint32_t* hw_fb;
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uint32_t* hw_fb2; // second scanout buffer (page flip), nullptr if unsupported
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@@ -322,12 +334,12 @@ public:
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montauk::memcpy(mirror, src, row_bytes);
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}
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}
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if (hw_mirror) asm volatile("sfence" ::: "memory");
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if (hw_mirror) wc_store_fence();
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if (hw_fb2) {
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// Wait for the latch (vsync): the buffer we just left becomes
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// safe to draw into only once the new one is actually scanning.
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asm volatile("sfence" ::: "memory");
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wc_store_fence();
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int64_t presented = montauk::fb_flip(hw_next, 1);
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if (presented == hw_next) {
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hw_next ^= 1;
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@@ -359,7 +371,7 @@ public:
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montauk::memcpy(mirror, src, row_bytes);
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}
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}
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asm volatile("sfence" ::: "memory");
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wc_store_fence();
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}
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}
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}
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@@ -419,6 +419,8 @@ typedef struct {
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Raw syscall wrappers
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==================================================================== */
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#if defined(__x86_64__)
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static inline long _mtk_syscall0(long nr) {
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long ret;
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__asm__ volatile("syscall" : "=a"(ret) : "a"(nr)
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@@ -491,6 +493,66 @@ static inline long _mtk_syscall5(long nr, long a1, long a2, long a3, long a4, lo
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return ret;
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}
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#elif defined(__aarch64__)
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// AArch64: number in x8, arguments in x0-x5, `svc #0`; the kernel
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// preserves every register except x0, which carries the result.
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static inline long _mtk_syscall0(long nr) {
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register long x8 __asm__("x8") = nr;
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register long x0 __asm__("x0");
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__asm__ volatile("svc #0" : "=r"(x0) : "r"(x8) : "memory");
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return x0;
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}
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static inline long _mtk_syscall1(long nr, long a1) {
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register long x8 __asm__("x8") = nr;
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register long x0 __asm__("x0") = a1;
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__asm__ volatile("svc #0" : "+r"(x0) : "r"(x8) : "memory");
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return x0;
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}
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static inline long _mtk_syscall2(long nr, long a1, long a2) {
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register long x8 __asm__("x8") = nr;
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register long x0 __asm__("x0") = a1;
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register long x1 __asm__("x1") = a2;
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__asm__ volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1) : "memory");
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return x0;
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}
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static inline long _mtk_syscall3(long nr, long a1, long a2, long a3) {
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register long x8 __asm__("x8") = nr;
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register long x0 __asm__("x0") = a1;
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register long x1 __asm__("x1") = a2;
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register long x2 __asm__("x2") = a3;
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__asm__ volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2) : "memory");
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return x0;
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}
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static inline long _mtk_syscall4(long nr, long a1, long a2, long a3, long a4) {
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register long x8 __asm__("x8") = nr;
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register long x0 __asm__("x0") = a1;
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register long x1 __asm__("x1") = a2;
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register long x2 __asm__("x2") = a3;
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register long x3 __asm__("x3") = a4;
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__asm__ volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2), "r"(x3) : "memory");
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return x0;
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}
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static inline long _mtk_syscall5(long nr, long a1, long a2, long a3, long a4, long a5) {
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register long x8 __asm__("x8") = nr;
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register long x0 __asm__("x0") = a1;
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register long x1 __asm__("x1") = a2;
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register long x2 __asm__("x2") = a3;
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register long x3 __asm__("x3") = a4;
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register long x4 __asm__("x4") = a5;
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__asm__ volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2), "r"(x3), "r"(x4) : "memory");
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return x0;
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}
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#else
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#error "unsupported architecture"
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#endif
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/* ====================================================================
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Process management
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==================================================================== */
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@@ -7,7 +7,11 @@
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extern "C" {
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#endif
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typedef unsigned long jmp_buf[8];
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#if defined(__aarch64__)
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typedef unsigned long jmp_buf[21]; /* x19-x30, sp, d8-d15 */
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#else
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typedef unsigned long jmp_buf[8]; /* rbx, rbp, r12-r15, rsp, rip */
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#endif
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int setjmp(jmp_buf env);
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void longjmp(jmp_buf env, int val) __attribute__((noreturn));
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@@ -1,6 +1,6 @@
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/*
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* syscall.h
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* MontaukOS program-side syscall wrappers using SYSCALL instruction
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* MontaukOS program-side syscall wrappers (x86_64 SYSCALL, AArch64 SVC)
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* Copyright (c) 2025 Daniel Hammer
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*/
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@@ -13,6 +13,8 @@ namespace montauk {
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// ---- Raw SYSCALL wrappers ----
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#if defined(__x86_64__)
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// The SYSCALL handler does not restore RDI, RSI, RDX, R10, R8, R9
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// (they are skipped on the return path). We move arguments into the
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// correct registers inside the asm block and list ALL argument
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@@ -108,6 +110,79 @@ namespace montauk {
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return ret;
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}
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#elif defined(__aarch64__)
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// AArch64: number in x8, arguments in x0-x5, `svc #0`; the kernel
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// preserves every register except x0, which carries the result.
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inline int64_t syscall0(uint64_t nr) {
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register uint64_t x8 asm("x8") = nr;
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register uint64_t x0 asm("x0");
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asm volatile("svc #0" : "=r"(x0) : "r"(x8) : "memory");
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return (int64_t)x0;
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}
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inline int64_t syscall1(uint64_t nr, uint64_t a1) {
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register uint64_t x8 asm("x8") = nr;
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register uint64_t x0 asm("x0") = a1;
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asm volatile("svc #0" : "+r"(x0) : "r"(x8) : "memory");
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return (int64_t)x0;
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}
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inline int64_t syscall2(uint64_t nr, uint64_t a1, uint64_t a2) {
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register uint64_t x8 asm("x8") = nr;
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register uint64_t x0 asm("x0") = a1;
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register uint64_t x1 asm("x1") = a2;
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asm volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1) : "memory");
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return (int64_t)x0;
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}
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inline int64_t syscall3(uint64_t nr, uint64_t a1, uint64_t a2, uint64_t a3) {
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register uint64_t x8 asm("x8") = nr;
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register uint64_t x0 asm("x0") = a1;
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register uint64_t x1 asm("x1") = a2;
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register uint64_t x2 asm("x2") = a3;
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asm volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2) : "memory");
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return (int64_t)x0;
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}
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inline int64_t syscall4(uint64_t nr, uint64_t a1, uint64_t a2, uint64_t a3, uint64_t a4) {
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register uint64_t x8 asm("x8") = nr;
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register uint64_t x0 asm("x0") = a1;
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register uint64_t x1 asm("x1") = a2;
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register uint64_t x2 asm("x2") = a3;
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register uint64_t x3 asm("x3") = a4;
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asm volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2), "r"(x3) : "memory");
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return (int64_t)x0;
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}
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inline int64_t syscall5(uint64_t nr, uint64_t a1, uint64_t a2, uint64_t a3, uint64_t a4, uint64_t a5) {
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register uint64_t x8 asm("x8") = nr;
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register uint64_t x0 asm("x0") = a1;
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register uint64_t x1 asm("x1") = a2;
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register uint64_t x2 asm("x2") = a3;
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register uint64_t x3 asm("x3") = a4;
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register uint64_t x4 asm("x4") = a5;
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asm volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2), "r"(x3), "r"(x4) : "memory");
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return (int64_t)x0;
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}
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inline int64_t syscall6(uint64_t nr, uint64_t a1, uint64_t a2, uint64_t a3, uint64_t a4, uint64_t a5, uint64_t a6) {
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register uint64_t x8 asm("x8") = nr;
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register uint64_t x0 asm("x0") = a1;
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register uint64_t x1 asm("x1") = a2;
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register uint64_t x2 asm("x2") = a3;
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register uint64_t x3 asm("x3") = a4;
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register uint64_t x4 asm("x4") = a5;
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register uint64_t x5 asm("x5") = a6;
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asm volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2), "r"(x3), "r"(x4), "r"(x5) : "memory");
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return (int64_t)x0;
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}
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#else
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#error "unsupported architecture"
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#endif
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// ---- Typed wrappers ----
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// Process
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