feat: add support for aarch64 timer/interrupts, port MontaukOS userspace

programs/include/montauk/syscall.h

@@ -1,6 +1,6 @@
 /*
     * syscall.h
-    * MontaukOS program-side syscall wrappers using SYSCALL instruction
+    * MontaukOS program-side syscall wrappers (x86_64 SYSCALL, AArch64 SVC)
     * Copyright (c) 2025 Daniel Hammer
 */
 
@@ -13,6 +13,8 @@ namespace montauk {
 
     // ---- Raw SYSCALL wrappers ----
 
+#if defined(__x86_64__)
+
     // The SYSCALL handler does not restore RDI, RSI, RDX, R10, R8, R9
     // (they are skipped on the return path).  We move arguments into the
     // correct registers inside the asm block and list ALL argument
@@ -108,6 +110,79 @@ namespace montauk {
         return ret;
     }
 
+#elif defined(__aarch64__)
+
+    // AArch64: number in x8, arguments in x0-x5, `svc #0`; the kernel
+    // preserves every register except x0, which carries the result.
+
+    inline int64_t syscall0(uint64_t nr) {
+        register uint64_t x8 asm("x8") = nr;
+        register uint64_t x0 asm("x0");
+        asm volatile("svc #0" : "=r"(x0) : "r"(x8) : "memory");
+        return (int64_t)x0;
+    }
+
+    inline int64_t syscall1(uint64_t nr, uint64_t a1) {
+        register uint64_t x8 asm("x8") = nr;
+        register uint64_t x0 asm("x0") = a1;
+        asm volatile("svc #0" : "+r"(x0) : "r"(x8) : "memory");
+        return (int64_t)x0;
+    }
+
+    inline int64_t syscall2(uint64_t nr, uint64_t a1, uint64_t a2) {
+        register uint64_t x8 asm("x8") = nr;
+        register uint64_t x0 asm("x0") = a1;
+        register uint64_t x1 asm("x1") = a2;
+        asm volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1) : "memory");
+        return (int64_t)x0;
+    }
+
+    inline int64_t syscall3(uint64_t nr, uint64_t a1, uint64_t a2, uint64_t a3) {
+        register uint64_t x8 asm("x8") = nr;
+        register uint64_t x0 asm("x0") = a1;
+        register uint64_t x1 asm("x1") = a2;
+        register uint64_t x2 asm("x2") = a3;
+        asm volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2) : "memory");
+        return (int64_t)x0;
+    }
+
+    inline int64_t syscall4(uint64_t nr, uint64_t a1, uint64_t a2, uint64_t a3, uint64_t a4) {
+        register uint64_t x8 asm("x8") = nr;
+        register uint64_t x0 asm("x0") = a1;
+        register uint64_t x1 asm("x1") = a2;
+        register uint64_t x2 asm("x2") = a3;
+        register uint64_t x3 asm("x3") = a4;
+        asm volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2), "r"(x3) : "memory");
+        return (int64_t)x0;
+    }
+
+    inline int64_t syscall5(uint64_t nr, uint64_t a1, uint64_t a2, uint64_t a3, uint64_t a4, uint64_t a5) {
+        register uint64_t x8 asm("x8") = nr;
+        register uint64_t x0 asm("x0") = a1;
+        register uint64_t x1 asm("x1") = a2;
+        register uint64_t x2 asm("x2") = a3;
+        register uint64_t x3 asm("x3") = a4;
+        register uint64_t x4 asm("x4") = a5;
+        asm volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2), "r"(x3), "r"(x4) : "memory");
+        return (int64_t)x0;
+    }
+
+    inline int64_t syscall6(uint64_t nr, uint64_t a1, uint64_t a2, uint64_t a3, uint64_t a4, uint64_t a5, uint64_t a6) {
+        register uint64_t x8 asm("x8") = nr;
+        register uint64_t x0 asm("x0") = a1;
+        register uint64_t x1 asm("x1") = a2;
+        register uint64_t x2 asm("x2") = a3;
+        register uint64_t x3 asm("x3") = a4;
+        register uint64_t x4 asm("x4") = a5;
+        register uint64_t x5 asm("x5") = a6;
+        asm volatile("svc #0" : "+r"(x0) : "r"(x8), "r"(x1), "r"(x2), "r"(x3), "r"(x4), "r"(x5) : "memory");
+        return (int64_t)x0;
+    }
+
+#else
+#error "unsupported architecture"
+#endif
+
     // ---- Typed wrappers ----
 
     // Process